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? xWGAIN ?
Active Power × ?
? 0 x 400000 ?
? BIGAIN ?
IRMSB INITIAL
? 0 x 400000 ?
? xVARGAIN ?
? 0 x 400000 ?
ADE7953
ENERGY CALIBRATION
GAIN CALIBRATION
The active, reactive, and apparent power measurements can
be calibrated on Current Channel A and Current Channel B
separately. This allows meter-to-meter gain variation to be
compensated for.
The AWGAIN register (Address 0x282 and Address 0x382)
controls the active power gain calibration on Current Channel A,
and the BWGAIN register (Address 0x28E and Address 0x38E)
controls the active power gain calibration on Current Channel B.
The default value of the xWGAIN registers is 0x400000, which
corresponds to no gain calibration. The minimum value that can be
written to the xWGAIN registers is 0x200000, which represents a
gain adjustment of ?50%. The maximum value that can be
written to the xWGAIN registers is 0x600000, which represents
a gain adjustment of +50%. Equation 29 shows the relationship
between the gain adjustment and the xWGAIN registers.
Output Power (W) = (29)
?
? ?
Similar gain calibration registers are available for the reactive
power and the apparent power. The reactive power on Current
Channel A and Current Channel B can be gain calibrated using
the AVARGAIN (Address 0x283 and Address 0x383) and
BVARGAIN (Address 0x28F and Address 0x38F) registers,
respectively. The apparent power on Current Channel A and
Current Channel B can be gain calibrated using the AVAGAIN
(Address 0x284 and Address 0x384) and BVAGAIN
(Address 0x290 and Address 0x390) registers, respectively.
The xVARGAIN and xVAGAIN registers affect the reactive and
apparent powers in the same way that the xWGAIN registers
affect the active power. Equation 29 can therefore be modified
to represent the gain calibration of the reactive and apparent
powers, as shown in Equation 30 and Equation 31.
Output Power (VAR) = (30)
Reactive Power × ?
? ?
Data Sheet
Current Channel Gain Adjustment
A gain calibration register is also provided on Current Channel B.
This register can be used to match Current Channel B to Current
Channel A for simple calibration and computation. The Current
Channel B gain calibration is performed using the BIGAIN register
(Address 0x28C and Address 0x38C). Equation 32 shows the
relationship between the gain adjustment and the IRMSB register.
IRMSB Expected = (32)
× ? ?
? ?
Similar registers are available for the voltage channel and for
Current Channel A: the AVGAIN register (Address 0x281 and
Address 0x381) and BVGAIN register (Address 0x28D and
Address 0x38D). Only the AVGAIN register affects the RMS
reading but to avoid discrepancies in other registers if AVGAIN
is set then BVGAIN should be set to the same value. The
AIGAIN register (Address 0x280 and Address 0x380) provides
the calibration adjustment and function in the same way as the
BIGAIN register.
PHASE CALIBRATION
The ADE7953 is designed to function with a variety of current
transducers, including those that induce inherent phase errors.
A phase error of 0.1° to 0.3° is not uncommon for a current
transformer (CT). These phase errors can vary from part to
part, and they must be corrected to achieve accurate power
readings. The errors associated with phase mismatch are
particularly noticeable at low power factors. The ADE7953
provides a means of digitally calibrating these small phase
errors by introducing a time delay or a time advance.
Because different sensors can be used on Current Channel A
and Current Channel B, separate phase calibration registers are
included on each channel. The PHCALA register (Address 0x108)
can be used to correct phase errors on Current Channel A, and
the PHCALB register (Address 0x109) can be used to correct
phase errors on Current Channel B. Both registers are in 10-bit
sign magnitude format, with the MSB indicating whether a time
delay or a time advance is added to the corresponding current
? xVAGAIN ?
? 0 x 400000 ?
Output Power (VA) =
Apparent Power × ?
? ?
(31)
channel. Writing a 0 to the MSB of the PHCALx register intro-
duces a time delay to the current channel. Writing a 1 to the
MSB of the PHCALx register introduces a time advance.
The maximum range that can be written to PHCALx[8:0] is
383 (decimal). One LSB of the PHCALx register is equivalent to
a time delay or time advance of 1.117 μs (CLKIN/4). With a line
frequency of 50 Hz, the resolution is 0.02°/LSB ((360 × 50 Hz)/
895 kHz), which provides a total correction of 7.66° in either
direction. With a line frequency of 60 Hz, the resolution is
0.024°/LSB ((360 × 60 Hz)/895 kHz), which provides a total
correction of 9.192° in either direction.
Rev. B | Page 34 of 72
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